untether

FullTime

<div><div style="padding: 0; margin: 15px 0 15px 0"><p><strong>Description</p></strong><p style="padding: 0; margin: 15px 0 15px 0"><div style="padding: 0; margin: 15px 0 15px 0"><b> ***Please note: While our engineering HQ is in Toronto, this is a remote opportunity and we welcome applicants from anywhere in North America.*** </b></div><div style="padding: 0; margin: 15px 0 15px 0"></div><div style="padding: 0; margin: 15px 0 15px 0"><span> We’re looking for best-in-class engineers to join our existing top-notch team. When you join Untether AI, you will be part of the team that creates innovative hardware and delivers industry-leading AI performance and efficiency. Utilizing non Von Neumann techniques, you will help propel sustainable AI <a href="http://inference.As" rel="nofollow"> inference. </a></span></div><div style="padding: 0; margin: 15px 0 15px 0"></div><div style="padding: 0; margin: 15px 0 15px 0"><span> As part of this talented team of engineers, you will able to architect, implement, verify and productize custom hardware designs. Being on our team means collaborating with an extremely bright group of people while tackling tough and interesting problems at the intersection of AI and hardware. </span></div><div style="padding: 0; margin: 15px 0 15px 0"></div><div style="padding: 0; margin: 15px 0 15px 0"><span> To support the growth of our organization, we are seeking a </span><b> Senior Staff Design Verification (DV) Engineer </b><span> with hands-on DV experience. In this role, you will be responsible for verifying new blocks and sub-systems, ensuring they meet all functional and performance requirements. The ideal candidate will have a strong background in block-level and sub-system verification and expertise in industry-standard verification methodologies. </span></div><div style="padding: 0; margin: 15px 0 15px 0"> Responsibilities </div><li style="margin-bottom: 5px"> Develop verification plans based on design specifications, architectural documentation, and technical requirements. </li><li style="margin-bottom: 5px"> Design, implement, and maintain verification environments, including testbenches, simulation models, and test scripts. </li><li style="margin-bottom: 5px"> Create and execute test cases to validate the functionality, performance, and robustness of hardware designs. </li><li style="margin-bottom: 5px"> Work closely with design engineers and project managers to achieve verification goals and meet project timelines. </li><div style="padding: 0; margin: 15px 0 15px 0"> Requirements </div><li style="margin-bottom: 5px"> BSc/MS/PhD in EE/CE/CS, or equivalent </li><li style="margin-bottom: 5px"> Prior 8+ years of experience in RTL Design Verification (Verilog/SystemVerilog) </li><li style="margin-bottom: 5px"> Working experience in design/RTL Verification with SV/UVM </li><li style="margin-bottom: 5px"> Experience with Object Oriented Programming concepts </li><li style="margin-bottom: 5px"> Experience with various verification tasks - test plan development, test bench development, simulation/waveform debug, coverage analysis </li><li style="margin-bottom: 5px"> Good verbal and written communication skills </li><li style="margin-bottom: 5px"> Ability to work independently and as part of a team </li><li style="margin-bottom: 5px"> Problem-solving and troubleshooting skills; ability to take initiative and solve problems </li><div style="padding: 0; margin: 15px 0 15px 0"> Preferred Skills  &  Experience </div><li style="margin-bottom: 5px"> Working experience with the following protocols is a plus: </li><li style="margin-bottom: 5px"> PCI Express Gen4-6 </li><li style="margin-bottom: 5px"> HBM </li><li style="margin-bottom: 5px"> UCIE </li><li style="margin-bottom: 5px"> AMBA (APB, AHB, AXI, CHI, CSX) </li><li style="margin-bottom: 5px"> Good understanding of computer architecture </li><li style="margin-bottom: 5px"> Knowledge of memory interfaces (DDR/LPDDR/etc.) </li><li style="margin-bottom: 5px"> Working knowledge of Linux </li><li style="margin-bottom: 5px"> Working knowledge of C/C++/Assembly is a plus </li><li style="margin-bottom: 5px"> Working knowledge of Python/Perl </li><li style="margin-bottom: 5px"> Knowledge of Deep Learning concepts and frameworks is a plus </li><li style="margin-bottom: 5px"> Experience in managing a team of 2 to 5 DV engineers is a plus. </li><div style="padding: 0; margin: 15px 0 15px 0"> What are some of the perks that you will receive being part of Untether AI? </div><li style="margin-bottom: 5px"> Aligned with Untether’s philosophy, our employees enjoy the same perks, regardless of role or level. In part, these include: </li><li style="margin-bottom: 5px"> 20 vacation days </li><li style="margin-bottom: 5px"> Strong health and extended health benefits </li><li style="margin-bottom: 5px"> Unlimited sick days </li><li style="margin-bottom: 5px"> Stock options </li><li style="margin-bottom: 5px"> Building chips and software that will change the world </li><div style="padding: 0; margin: 15px 0 15px 0"> Thinking about applying? </div><li style="margin-bottom: 5px"> We’re a pretty welcoming bunch of people. If we’ve piqued your interest, you’re passionate about the same things we are but you aren’t sure if you check all the boxes, please apply anyway. We’re a great place to work, an even better place to learn and we focus on both capability and potential! </li><li style="margin-bottom: 5px"> Besides being a pretty friendly group, we’re also pretty diverse - ethnically, experientially and in our physical and mental abilities. If you are someone who needs accommodation during the interview process and/or in the workplace, please send a note along with your resume to <a href="mailto:careers@untether.ai" rel="nofollow"> careers@untether.ai </a> and we’ll be in touch. </li><div style="padding: 0; margin: 15px 0 15px 0"><b> A little bit more about Untether AI </b></div><div style="padding: 0; margin: 15px 0 15px 0"></div><div style="padding: 0; margin: 15px 0 15px 0"><span> Untether AI has developed a groundbreaking new architecture that brings neural net inference to new levels of performance and efficiency. We’ve already sold our product to smart clients who want to get in at ground zero. We’ve done this while continuing to improve our technology creating ultra-efficient, high performance AI chips that eliminates the data movement bottleneck that costs energy and performance in traditional architectures. We’re a team made up of scientists, engineers and entrepreneurs and have the support of tier one investors. Join us to be part of something big - a chance to create the future of AI. </span></div></p></div></div>

untether

Senior Staff Design Verification Engineer

SALARY RANGE

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